ユーザーズガイド GIGABYTE GA-6VX7-4X

[. . . ] [. . . ] 1. 1 ৿1ߓ R-11-01-001123 6OXE ͐QV̶͕̮͐ ̀ ͓̽VTVS CPU  RUVR͓̽VTVS O O O 30. 6 cm x 21. 9 cm ATX PCB. ̚6OXE-1  ķ ̧ ̸̾̈́S 370 T͜R̼̈́ 6OXE series 6OXE Intel Pentium!!!100/133MHz FSB FC-PGA Intel CeleronTM 66MHz FSB FC-PGA VIA Cyrix III  100 MHz FSB CPGA ( CPU ) ̼̱R͐QV̶͕̮͐̀̚4 Ԕ O ͂̈́TR̈́S ̶̶̈́͜RQ͈ UV̀ ͖͗U ̺͢S͜VU R̈́͜S I/O O O O O O O O O O O O Q͢TVSIDE O O O L2̴̈́͘R͚L2 cache in CPU (CPU ̣  ̦) Intel 82815EP HOST / AGP / SDRAM ̺͢S͜VU 82801BA I/O ̺͢S͜VU͊͑(ICH2) Realtek RTM560-25 66/100/133 MHz RR͇͕͋R౞֘ 4 168-͏͢ DIMM ̸̾̈́S (DIMM 4 QTRU ͢ ) PC-100 / PC-133 SDRAM P̼͒VS Ѣ512MB ̼͒VS 3. 3V SDRAM DIMM P̼͒VS IT8712 1 AGP R̈́͜S 4X ͗VS & AGP 2. 0 « P̼͒VS 6 PCI R̈́͜S 33MHz & PCI 2. 2 «P̼ ͒VS 1 CNR (ౚ ͈̈́S͞V̶U̱̽) R̈́͜S PIO ͗VS 3̚4̚UDMA33/ATA66/ATA100 IDE & ATAPI CD-ROMP̼͒VS Ѣ4 ATAPI S̱͋R  ̦2 IDE ͋R͓R ̀(UDMA 33/ATA 66/ATA100) IDE ͒VS  CPU ̚ ̚ ̚ ೒͋VRU͢ ̦  1  ̱͢RSVUQ̱S Q͢TVS ķ  O O O O ͊VS̳Q̯͗ S̀ Q͢TVS̼̳ ͢S BIOS O O O O O O O O O O O O O O O O O ̶̺́̀͢ ĺ  PS/2 ͐̈́͜͏V͒VS 360K̚720K̚1. 2M̚ ̣ 2. 88M ̱͋S 2 FDD P̼͒VS ͌UUU͒VS SPP/EPP/ECP ͗VS P̼͒VS 2 RU̯U͒VS (COM A & COM B) 4 USB ͒VS IR/CIR  1 IrDA ̶̺͈̀ CPU/ş /RR͇͕̮͐͢ ֘ CPU ֘ (VIA Cyrix III CPU т QTRU͢) RR͇͕ş CPU ľ ̣̦R̈́͘Ś̳͢ Creative CT5880 ̼̳͢S(QTRU͢) AC’97 CODEC U̱̱͢͢/U̱̯̳͢S/Mic In/AUX In/CD In/TEL/ SPDIF (QTRU͢)/̹V͕͒VS/4R ͏VQV(QTRU͢) U̱R͢RP AWARD BIOS̚4M ͎̈́S ͐ǗR͚ROM Dual BIOSP͒VS(QTRU͢) PS/2 ̴VTVS̱̀͢V͐Q̱R ̣ PS/2 ͓̳Ṟ̀͢V͐Q̱R ̳QV̶Q͢LAN(WOL)P̼͒VS STR (RAM ̼RT͢S) (QTRU͢) /ќ͗S͕ P̼͒VS 3 ̮͐͢ş ̶̺͈̀P ̴VTVS ľş P ̦͒UQR͇ U͍͚VR @BIOS™ ̣ EasyTuneIII™P̼͒VS 1 1. 44M 1 ® 2 6OXE RUVR͓̽VTVS CPU SW1 RR͇͕͋R౞֘ 55~153MHz ൶  ̛͛V̽V ̣ RR͇͕͋R౞֘P ̛ O: ౞֘ R̈́S̯̈́T SDRAM 82. 50 90. 00 100. 20 102. 50 105. 00 108. 00 112. 50 115. 50 83. 00 90. 00 100. 30 103. 00 112. 50 115. 00 120. 00 125. 00 128. 00 130. 00 133. 70 137. 00 140. 00 145. 00 150. 00 153. 00 DIP Ṟ̈́͂ 6 X X O X O X O X O X O X O X O X O X O X O X O X O SW1: CPU ஀/ 55. 00 60. 00 66. 80 68. 33 70. 00 72. 00 75. 00 77. 00 83. 00 90. 00 100. 30 103. 00 112. 50 115. 00 120. 00 125. 00 128. 00 130. 00 133. 70 137. 00 140. 00 145. 00 150. 00 153. 00 ஀/ 1 X O O O O O O O O O O O O O O O O O O O O O O O O 2 X O O O O O O O O O O O O O O O O X X X X X X X X 3 X O O O O O O O O X X X X X X X X O O O O O O O O 4 X X X X X O O O O X X X X O O O O X X X X O O O O 5 X O O X X O O X X O O X X O O X X O O X X O O X X Q̚͢X :Q͐ 3  ̱͢RSVUQ̱S CPU 125. 00 130. 00 133. 70 137. 00 140. 00 145. 00 150. 00 153. 33 SDRAM 93. 75 97. 50 100. 28 102. 75 105. 00 108. 75 112. 50 115. 00 1 O O O O O O O O 2 X X X X X X X X 3 X X X X X X X X 4 X X X X O O O O 5 O O X X O O X X 6 X O X O X O X O ஀/ ‫ڛ‬: CPU 66 100 133 SDRAM 100 100 133 100MHz  ~ ̛ RR͇͕͖͗U 1 O 2 X 133MHz FSB CPU P  5 X ̦ 6 X P  CPU 133. 70 : SDRAM 100. 28 3 X 4 X T͜R̼̈́ P  CPU TRS ̛CPU P P ̦RR͇͕͋R ‫ݫ‬P P ̚ ̧ ߨ~ ͋R ‫ݫ‬ ̣ P ķ  P R͇͕ ̧̤ ͋R ‫ݫ‬  ӹ ̈́TR̈́S̚SDRAM̚QVS ͊VS̳Q̯ ‫ݫ‬P ~ ~ ̦ : CPU͂̈́̚TR̈́S̚ ̤ ̛ R ̦ ̚CPU, ͂̚ ‫̛ ̥̣ ڛ‬ 4 6OXE RUVR͓̽VTVS ̶̺͈̀ ATX ş 10 20 ͏͢ 3, 5, 7, 13, 15-17 1, 2, 11 4, 6, 19, 20 10 12 18 8 9 14 ~ GND 3. 3V VCC +12V -12V -5V 1 11 ş īҊ Ṟ̀͋͢ +5V PS-ON(̾͐S ̣ ̦Q͢/Q͐) 5V SB COM A / COM B / LPT ͒VS LPT ͒VS COM A COM B 5 CN9: ෧USB ͒VS 1 9 2 10 1 2 3 4 5 6 7 8 9 10  ̱͢RSVUQ̱S ͏͢ ~ +5V GND USB D2NC USB D2+ USB D3+ NC USB D3GND +5V CN13 : ∗ ෧QVS̰Q̶̺͈̀P ‫ס‬ ̣ 13-14 ̶͜VR ~ ෧QVS̰Q(QTRU͢) т̚R͌͘͢P11-12 ̶͜VR ̛ ͏͢ 1 2 3, 4, 5, 6, 10, 15 7 8, 16 9 11 13 12 14 1 2 ~ R͏VQV( ) R͏VQV() GND +12V NC 15 16 ෧QVS̰Q() ෧QVS̰Q( ) ġ෧QVS̰Q() ġ෧QVS̰Q( ) MIC 6 6OXE ͐̈́͜͏V͒VS RUVR͓̽VTVS ઢ ̹V͕ & QVS̰Q͒VS ̹V͕ ͒VS U̱̯̳͢S MIC In U̱̱͢͢ /U̱̯̳͢S 2 U̱̯̳͢S 1: U̱̯̳͢S SPDIF (SPDIF S̰R̀UQVS̰QPќR͏VQV ̚ ૅ ̧ ̯ AC3 SV̀Pќ Dolby S̰R̀US̺V́  ̦ )̛ ஢ ̚U̱̯̳͢S 1 ̚ S̰R̀U P ̦ ̚ౚ U̱̯̳͢S ̥̚஀/å SPDIF ̯̳S nÇ ̧ (   )̛ 52 TVRP U̱̱͢͢: ஢ ̚U̱̱͢͢ ౚ U̱̱͢͢ ̛ Creative ̯TU̸VRU͢ “4 R͏VQV”P ̦  )̚U̱̱͢͢ (  50 TVRP U̱̯̳͢S 2 nÇ ̧̚  2  R͇UQR͏V QVPU̱̯̳͢S 1 U̱̱͢͢ ‫ވ‬ 7 IDE1 (1 ) ̚IDE2 (2 ) ͒VS IDE 2 IDE 1  ̱͢RSVUQ̱S ઢ J1: CPU ̮͐͢ ͏͢ ~ 1 2 3 1 GND +12V SENSE 8 6OXE J2: ş ̮͐͢ RUVR͓̽VTVS ͏͢ ~ 1 2 3 1 GND +12V SENSE J5: CD QVS̰QU̱̱͢͢ 1 ͏͢ ~ 1 2 3 4 CD-L GND GND CD-R 9  ̱͢RSVUQ̱S J6: AUX_IN 1 ͏͢ 1 2 3 4 AUX-L GND GND AUX-R ~ J7: TEL: ̶̺͈̀ # ̶̺͈̀P 1 ͗S͕ ~ -̱͢ ͏͢ 1 2 3 4  ̯̳S GND GND - 10 6OXE J10: ߨ RUVR͓̽VTVS SMBUS ͏͢. 1 1 2 3 4 5 SMB CLK NC GND SMB DATA +5V ~ J12: ̳QV̶Q͢LAN 1 ͏͢ ~ 1 2 3 +5V SB GND  11 J13: U̷͢ş Q͢( ͗S͕QVS 1  ̱͢RSVUQ̱S ) ͏͢ 1 2 GND ~  J14: RR͇͕̮͐͢ ͏͢ ~ 1 2 3 1 GND +12V SENSE 12 6OXE RUVR͓̽VTVS J15: IA ͒VS(QTRU͢) ͏͢ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2 1 20 19 ~ ̵Q̱͋S Web ̼̱S ̱̀͢V͈̈́S  RǗ͏̷͢ č G şӔ͖VU ?- ‫ވ‬a  ̥ a ͔͚VS Mic #೒P ̦ Mic #೒P ̦ R͏VQV #೒P ̦ R͏VQV #೒P ̦ ‫܀‬ NC JP7: STR LED ̶̺͈̀ & LED1: DIMM LED + DIMM LED 1 STR LED ̶̺͈̀ќ 13 ̚S̰R̀UQVS̰QPќR͏ VQV ̚ ૅ ̧ AC3SV̀PќDolby S̰R ̀US̺V́  ̦ ̛)[QTRU͢] JP9: SPDIF(SPDIF 1  ̱͢RSVUQ̱S ͏͢ 1 2 3 VCC SPDIF GND ~ ̯̳S JP13: IR/CIR ͏͢ 1 5 6 10 1 2 3 4 5 6 7 8 9 10 ~ VCC NC IRRX GND IRTX NC CIRRX VCC CIRTX NC 14 6OXE RUVR͓̽VTVS JP27: SCR: R͓VSQVSUV́V 1 2 ͏͢ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 13 14 VCC NC NC NC SCRFET SCRRST SCRCLK NC NC SCRIO GND SCRPRES NC NC ~ JP28: 6 ) ͢ ͈͂͘͢U QVS̰QQVS̶̺͈̀ (QTRU 2 14 ͏͢ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 ~ +5V  GND  +3. 3V  GND +12V NC 13 GND     15 PS/2 ̴VTVS& PS/2 ͓̳R̶̺͈̀ PS/2 6 4 2  ̱͢RSVUQ̱S ͓̳R 5 3 ͓̳R/̴VTVS ͏͢ ~ SV̀ 1 PS/2 2 3 4 5 6 NC GND VCC (+5V) PS/2 ̴VTVS 1 ̶̶̈́͜ NC USB ̶̺͈̀ 5 6 78 ͏͢ ~ 1 2 3 4 5 6 7 8 1 2 3 4 USB V0 USB D0USB D0+ GND USB V1 USB D1USB D1+ GND 16 6OXE ͈͌U ̣ R͌͘͢~ J11: 2x11 RUVR͓̽VTVS ͏͢R͌͘͢ GN 1 1 P+ P− P− HD 1 1 PW ď Ṟ̈́͂) QVT͢: ‫ܨ‬ ̶͜VR: ď ͗VS 1̦ GD (ď LED) ͏͢1: LED " (+) Pin 2: LED " (−) HD (IDE ͊VSS̰R̶̯ Pin 1: LED " (+) ̶͇̰͑LED) Pin 2: LED " (−) SPK (R͏VQV̶̺͈̀) Pin 1: VCC(+) Pin 2- ͏͢ 3: NC Pin 4: SV̀ (−) RE (Ṟ̈́͂ UR̈́S) QVT͢: ‫ܨ‬ ̶͜VR: ͊VS̳Q̯RR͇͕ U R̈́S P+P−P−(ş LED) ͏͢1: LED " (+) ͏͢2: LED " (−) ͏͢3: LED " (−) QVT͢: ‫ܨ‬ PW (̾͐S ̣̦ş ̺ ̶͜VR: ş Q͢/Q͐ ̶͈̀) GN ( 17 GD 1 RE SPK JP1: USB) ġ෧USB S̱͋R 1 (USB ̶̺͈̀  ̱͢RSVUQ̱S ͏͢ ~ ġ෧ USB P ̶͜VR ̦S̱͋R 1-2 2-3 ̶͜VR (S͐QUS) USB (“S3 USB KB/ BIOS “S3 USB KB/ " JP1 & JP4" *( ̺͢͏͚V̀ ş PQ͢ ͖͗U Q̳͢SPŗ v ̤ <Del>P ̛BIOS R̈́S̯̈́T 1̥ ̛̯̱͇͕“ş ࠶R̈́S̯̈́T”P ̤̚“S3 ̤USB KB/͓̳R : ”P ̛"ESC"P “R̈́S̯̈́TP {  ”QTRU͢P  ̚ ~P { ̦ P‫̧ש‬ ̛ ͌ ̤ ~ ͓̳R P  т̚ ̤ ͓̳R ” R͘͢ P ~ ̧ ̥” P)̛ JP3: PS/2 ̴VTVSş Q͢ 1 ͏͢ ~ 1-2 ̶͜VR PS/2 ̴VTVSş Q͢P ̦ 2-3 ̶͜VR (S͐QUS) 18 6OXE RUVR͓̽VTVS JP4: STR P ̦ 1 1-2 2-3 P ̶͜VR ̶͜VR STR STR ( ~ P ̦ P ̦ S͐QUS) JP5: (JP5 ) ľş CPU ౞̯֘̈́T (͓R̶̈́͑VR̀V) P“1-2̶͜VR” ~ ̦ ̚CPU ş 10% ̥ 1 ͏͢ ~ 1-2 ̶͜VR ̀VT ľş  т [ş 10%̯̈́T] 2-3 ̶͜VR (S͐QUS) 19 JP6: DIMM ľş 1  ̱͢RSVUQ̱S ͏͢ ~ 1-2 ̶͜VR DIMM ľş P ̦ 2-3 ̶͜VR DIMM ľş P ̦(S͐QUS) JP12: ͑̽V̶̺͈̀ (QTRU͢) 1 ͏͢ ~ ̶͜VR ͑̽VP ̦(S͐QUS) 2-3 ̶͜VR ͑̽VP ̦ 1-2 20 6OXE RUVR͓̽VTVS JP14: ̱͕̯̳̀S?ވ‬ / ̦ JP15: RV͐͗VS// 1 ͏͢ ~ 1-2 ̶͜VR (S͐QUS) 2-3 ̶͜VR RV͐͗VS 1-2-3 QVT͢  21 JP18: CMOS  ̶U̯ 1  ̱͢RSVUQ̱S ͏͢ ~ 1-2 ̶͜VR CMOS ̶U̯ 2-3 ̶͜VR (S͐QUS) JP19: ෧USB S̱͋R CN9  (USB ͒VS Æ CN9) 1 ͏͢ ~ ෧ USB S̱͋R 1-2 ̶͜VR P ̦ 2-3 ̶͜VR (S͐QUS) ̤USB KB/͓̳R т ” P  ̚BIOS ~“S3 ̤USB KB/͓̳R ” R͘͢ ͌“JP19&JP4”P ~ ̧ ̥ P)) ͖͗U Q̳͢SPŗv *(̺͢͏͚V̀ ş PQ͢ ̤ <Del>P ̛BIOS R̈́S̯̈́T 1 ̥ ̛̯̱͇͕“ş ࠶R̈́S̯̈́T”P ̤̚ ̛ “S3 ̤USB KB/͓̳R : ”P  ”QTRU͢P "ESC"P “R̈́S̯̈́TP { (“S3  ̚ ~P { ̦ P‫̧ש‬ 22 6OXE RUVR͓̽VTVS JP20: FWH ͐ǗR͚ ķ 1 1-2 2-3 ͏͢ ~ ̶͜VR ķ ̶͜VR (S͐QUS)  BIOS S̱͋RPÇ ̦ ̚R͌͘͢ JP20 P“2-3 ̶͜VR” ~ BIOS  ķ P ̛ JP21: ෧̶͑̈́͜ ̶̈́͜ 1 ͏͢ ~ 1-2 ̶͜VR ෧̶͑̈́͜ ̶̈́͜ "(S͐QUS) 2-3 ̶͜VR ෧̶͑̈́͜ ̶̈́͜ 23 JP22: ̸VRPŗ 1  ̱͢RSVUQ̱S ͏͢ ~ 1  2 GND JP23: PCI/AGP 3VAUX 1 ͏͢ ~ ̶͜VR PCI/AGP 3. 3Vsb P ̦(S͐QUS) 2-3 ̶͜VR PCI/AGP 3. 3Vsb ̦ 1-2 24 6OXE RUVR͓̽VTVS JP24 & JP31: CNR ∗JP24 & JP31 (QTRU͢)  ̧ GA-6VX7-4X-1 ̥ CNR QVS ̛ ̦  { т̚1 ̚AC97 CODEC 1 JP24 1 JP31 ͏͢ ~ ̶͜VR CNR 2 (S͐QUS) CNR1 ̦ AC’97 P 2-3 ̶͜VR (Q͢TVS CODEC P ̦) 1-2 JP26: Q͢TVS̼̳͢S  (QTRU͢) 1 ͏͢ ~ Q͢TVS̼̳͢SP 1-2 ̶͜VR  ̦( S͐QU S) Q͢TVS̼̳͢SP 2-3 ̶͜VR ̦ 25 JP32: SPDIF  (QTRU͢) 1  ̱͢RSVUQ̱S ͏͢ ~ 1-2 ̶͜VR  (S͐QUS) 2-3 ̶͜VR JP33: ෧MIC (QTRU͢) 1 ͏͢ ~ ̶͜VR ෧ MIC P (S͐QUS) QVT͢ ෧ MIC P ̦ ̦ 26 6OXE RUVR͓̽VTVS BAT1: ͇͋̈́U +  ͓̽VTVS ̚4 DIMM(Dual Inline Memory Module)̸̾̈́S  ̧ ̥̚6̶͋͢P̼͒VS ̛BIOS ͖͗U ̱̀T ̼̱RP஀/ å ̛͖͗U͗R͚VUP̥S ̦ ̚DIMMR̈́͜S f  ̛DIMM ͗R͚VU ͉̈́͂ 2 ̚1 ķ P̛͖͗U̼̱R ̸̾̈́S ̣  ̥ ̛  P ̣̦͖͗U ̥S : 168-͏͢SDRAM DIMM͗R͚ т VU DIMM1 ߒ෧ (̶͋͢ ෧ 0, 1) DIMM2 ߒ෧ (̶͋͢ ෧ 2, 3) DIMM4 ߒ෧ ̥ ߒ෧ DIMM3 P (̶͋͢ DIMM4  4, 5) ෧ ̧ ̥ P ͖͗U ̥S ƬƫႹ*႟@ƥƨƦၲ൶౷ႂၾƬƫႹ *႟1ƨƨƦ ࣴƥƨ›̧ ̥ ̛ Ā  ͖VQV ‫܃‬ѿ ̦Љ ͇͋̈́U @ ̛  ͋  ͖VQV ‫ۂ‬ñ  ͇̈́UP ̛  27  ̱͢RSVUQ̱S DIMM4 ( 4, 5) ߒ෧ ̶͋͢ ෧ RR͇͕͖͗U(••512MB) DIMM3 ߒ෧ ̥S ̧ ̥ P DIMM3  ̧ ̥ P •16 / 32 / 64 / 128 / 256/ 512 MB SDRAM DIMM  ͗R͚VUP̼͒VS : 1. DIMM4 QTRU͢ ̛  ߒ෧͖͗UP  ̦ ̚DIMM3 ߒ෧͖͗UP  ̧ ̥ P̛DIMM4 ෧͖͗UP  ̦т̚DIMM3 ͖͗U P ̥S ̛ 28 [. . . ] [. . . ]