ユーザーズガイド MSI MS-7666 G52-76661X3 V1.0
Lastmanualsはユーザー主導型のハードウエア及びソフトウエアのマニュアル(ユーザーガイド・マニュアル・クイックスタート・技術情報など)を共有・保存・検索サービスを提供します。 製品を購入する前に必ずユーザーガイドを読みましょう!!!
もしこの書類があなたがお探しの取扱説明書・マニュアル・機能説明・回路図の場合は、今すぐダウンロード。Lastmanualsでは手軽に早くMSI MS-7666 G52-76661X3のユーザマニュアルを入手できます。 MSI MS-7666 G52-76661X3のユーザーガイドがあなたのお役に立てばと思っています。
MSI MS-7666 G52-76661X3のユーザーガイドをLastmanualsがお手伝いします。
マニュアル抽象的: マニュアル MSI MS-7666 G52-76661X3V1.0
詳しい操作方法はユーザーガイドに記載されています。
[. . . ] ãã¼ãã¦ã§ã¢ã»ããã¢ãã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 㯠㤠ã㯠ã³ã³ ã ã¼ ã ã³ ã 㬠㤠ã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 CPU ã« é¢ ãã 注æäºé
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 㡠㢠㪠. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 é» æº . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 ã ãã¯ã ã ã« . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 ã³ ã 㯠ã¿ã¼ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 㸠㤠ã³ã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19 ã¹ã ãã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20 第 3ç« . BIOSã®è¨å® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 BIOSã»ãã 㢠ãã ç» é¢ ã® èµ·å . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] A-4 ã ã¼ ã 㦠㧠ã¢ã® ã»ãã 㢠ãã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
viii
Appendix B Dual Core Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 Dual Core Center ã㢠ã¯ã ã£ã ã«ãã . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-2 ã¡ ã¤ã³ ã¡ã ã¥ã¼ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3 D O T ( ã 㤠ãã ã㯠㪠㼠ã 㼠㯠ã ã㯠) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-5 㯠ã ã㯠. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-6 é» å§ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-7 ãã¡ ã³ åè»¢æ° . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-8 温 度 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-9 㦠㼠㶠㼠ã ã ã㡠㤠㫠. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-10
ix
Getting Started
第ï¼ç«
ã¯ããã«
P 4 5 N e o / G 4 5 N e o/ P 4 3 N eo ã·ãªã¼ãº( M S 7 5 1 9 v 1 . X ) A T X ã㶠㼠ãã¼ ã ãã è²· ã ä¸ã ã ãã ããèª ã«ãããã¨ããããã¾ãã P45 Neo/G45 Neo/ P43 Neoã·ãªã¼ãºã¯ Intel® P45/G45/P43&ICH10ããã ã»ããã«åºã¥ãã¦ãã¾ãã L G A 77 5 I nt el ® Cor e 2 Extreme, Core 2 Quad, Core 2 Duo, Pentium Dual-Coreå ã³ Celeron Dual-Coreããã»ããµã®ãã¶ã¤ã³ã«æºæ ã ã¦ãã P45 Neo/G45 Neo/P43 Neoã·ãª ã¼ãº ã¯ãã¤ ï¼ ã ãã©ã¼ãã³ã¹åã³ãããã§ãã·ã§ãã«. ãã¹ã¯ãã ã. C P U ã® ã© ã³ã 㵠㤠ã ã« ãã¼ ( 端å ä¿è·ã«ãã¼) ãå¤ãã¾ãã 2. C P U ã½ ã± ã ã 㬠ã ã¼ å´ ã ã ã½ ã±ããä¿è·ã«ãã¼ããã£ããå¤ ãã¾ãã
3. C P U ã½ ã± ã ã ã® ã ã³ ã é² åº ã ã ç¶æ
ã«ãªãã¾ãã
4. 1000 Mbit/sec data rate is selected.
ãªã¼ãã£ãªãã¼ã ãªã¼ãã£ãªããã¤ã¹ã¨ãã¦ä½¿ç¨ããã¾ããã³ãã¯ã¿ã¼ãè²ã§åå¥ããã¸ã£ã ã¯ã®è²ã«ãã£ã¦é³é¿ãéãã¾ãã Line-In ( éè² ) - Line In, CD ãã¬ã¤ 㤠ã¼ããã¼ ããã¬ã¤ 㤠ã¼ãª ã© ã® å¤é¨ ãªã¼ãã£ãªæ©å¨ãæ¥ç¶ãã¾ãã Line-Out ( ç·è² ) - Line Out, ã¹ ã ã¼ ã« ããã㯠ã ã ã ã ã³ã æ¥ç¶ ãã¾ãã M ic ( ãã³ã¯ ) - Mic In, ã 㤠㯠ã æ¥ç¶ ãã¾ãã RS-Out ( é»è² ) - 4/ 5. 1/ 7. 1 ã㣠㳠ã ã«ã¢ ã¼ãã«ã¯ Rear-Surround Out ç¨ ã CS-Out ( ãªã¬ã³ã¸ ) - 5. 1/7. 1 ã㣠㳠ã ã«ã¢ ã¼ãã«ã¯ Center/Subwoof erOut ç¨ã SS-Out ( ç°è² ) - 7. 1 ã㣠㳠ã ã«ã¢ ã¼ãã«ã¯ Side-Surround Out ç¨ ã
2-11
M S-7519 M ainboard
ã³ãã¯ã¿ã¼
FDDã³ãã¯ã¿ã¼: FDD1
æ¬è£½å 㯠360KB, 720KB, 1. 2MB, 1. 44MB åã³ 2. 88MB ã® ãããã ã¼ ã 㣠㹠㯠ã ã© ã¤ãã«å¯¾å¿ãã¦ãã¾ãã
IDEã³ãã¯ã¿ã¼: IDE1
æ¬è£½å 㯠I DE H DD ã å
å¦ ã 㣠㹠㯠ã ã©ã¤ ã 㪠㩠㮠ã ã 㤠ã¹ã ãµã ã¼ããã¾ãã
注æï¼
ãã¼ããã£ã¹ã¯ã2 å°ä½¿ç¨ããå ´åã¯ãã¸ã£ã³ããã³ã§ãã¹ã¿ã¼/ ã¹ ã¬ã¼ãã®è¨å®ãè¡ãå¿
è¦ãããã¾ããã¸ã£ã³ãè¨å®ã«ã¤ãã¦ã¯ãã¼ã ãã£ã¹ã¯ã¡ã¼ã«ã¼ãæä¾ããããã¥ã¢ã«ãåç
§ãã¦ãã ããã
2-12
Hardware Setup
ã·ãªã¢ã«ATAã³ãã¯ã¿ã¼: SATA1~6
ãã® ã³ãã¯ã¿ ã¼ã¯ é« é S er i al ATA 㤠㳠㿠㼠ã 㧠㤠㹠ã ã¼ ãã§ãã ä¸ ã¤ã® ã³ã㯠ã¿ã¼ã«ã¤ããä¸ã¤ã®ãã¼ããã£ã¹ã¯ãæ¥ç¶ãããã¨ãã§ãã¾ãã
SATA1 SATA3 SATA5
SATA2 SATA4 SATA6
注æï¼
㷠㪠㢠㫠ATA ã± ã¼ ã 㫠㯠9 0 度 ã® è§ åº¦ ã® æ ã æ²ã ãªãã ã ã«æ³¨æãã¦ã ã ããããã¼ã¿è»¢éæã«ãã¼ã¿æ失ãèµ·ããå¯è½æ§ãããã¾ãã
2-13
M S-7519 M ainboard
ãã¡ã³é»æºã³ãã¯ã¿ã¼: CPUFAN1, SYSFAN1, SYSFAN2
ãã¡ ã³é» æºã³ã㯠㿠ã¼ã¯ + 1 2 V ã®å· å´ã ã¡ ã³ã ãµã ã¼ ããã¾ ãã æ¥ ç¶ ãã æ 㫠注æã ãªãã ã° ãªã ãªãã® ã¯ã 赤 ã ç· ã¯ ãã© ã¹ãªã® 㧠+ 1 2 V ã«ã é» ã ç· ã¯ã¢ã¼ ã¹ãªã® 㧠G N D ã« æ¥ ç¶ ã ãã ã¨ã§ ãã ã¾ã ã æ¬ è£½å ã®ã· ã¹ã ã ã ã¼ã ã¦ã§ 㢠㢠ãã¿æ©è½ã使ç¨ããå ´åã¯ãã¡ã³ã®å転æ°ã»ã³ãµã¼æ©è½ãã¤ãããã¡ã³ã使 ç¨ããå¿
è¦ãããã¾ãã
CONTROL SENSOR GND +1 2V SENSOR/ NC
+1 2V GND
GND +1 2V SENSOR/NC
CPUFAN1
SYSFAN1
SYSFAN2
注æï¼
1 . å
¬éã®ã¦ã§ããµã¤ãã«æ¨è¦ããããã¡ã³ãåç
§ãã¦ãã ããã 2. CPUFAN1 㯠ãã¡ ã³ ã³ ã³ã ã ã¼ ã© ã¼ã ãµã ã¼ããã¾ãã 㦠㼠㶠ã¼ã¯ BI O S ã® H / W M o n i t o r ã¡ ã 㥠ã¼ã«ã¯ ã ã¡ ã³å 転é 度 ã èª¿æ´ ã§ ã ã D u a l C o r e Center 㦠ã¼ã 㣠㪠ã ã£ ã§ ç® ä¸ ã® CPU 温 度 ã«ãã èª å ç ã« CPU ãã¡ ã³ã®å 転æ°ãã³ã³ããã¼ã©ã¼ãã¾ãã 3 . 3 ã¾ã㯠4 ã ã³ã® ã㡠㳠㯠㼠㩠ã¼ã¯ C P U FA N 1 ã« ä½¿ç¨ ã§ ã ã¾ãã
ã±ã¼ã¹éæ¾ã»ã³ãµã¼ã³ãã¯ã¿ã¼ : JCI 1
ãã® ã³ ã 㯠㿠㼠㫠㯠2 ã 㳠㮠㱠㼠㹠㹠㤠ã ã ã æ¥ ç¶ ã ã¾ ã ã ã± ã¼ ã¹ ã é ã ã 㨠éæ¾ã»ã³ãµã¼ãã·ã§ãããã¾ããã·ã¹ãã ã«ã¯ãã®éæ¾ä¿¡å·ãè¨é²ãããè¦ å ã¡ ã 㻠㸠㼠ã ç» é¢ ã« è¡¨ 示 ã ãã¾ ã ã è¦ å ã¡ ã 㻠㸠ã¼ã æ¶ ã ã«ã¯ ã B I O S 㦠㼠ãã£ãªãã£ã¼ããã¡ãã»ã¸ã¼ã®ã¯ãªã¢ãããã¾ãã
CINTRU GND
1 2
JCI1
2-14
Hardware Setup
IEEE1394ã³ãã¯ã¿ã¼: J1394_1(ãªãã·ã§ã³)
ãã® ã³ãã¯ã¿ ã¼ã¯ 㪠ã 㷠㧠ã³ã® IEEE1394 ã ã©ã± ã ã çµç± 㧠IEEE1394 ã ã 㤠ã¹ã æ¥ç¶ãã¾ãã
Pin Definition
PIN 2 1 10 9 1 3 5 7 9 SIGNAL TPA+ Ground TPB+ Cable power Key (no pin) PIN 2 4 6 8 10 SIGNAL TPAGround TPBCable power Ground
J1394_1
IEEE1394 Bracket ( 㪠ã 㷠㧠㳠)
S/PDIF-Outã³ãã¯ã¿ã¼: JSP1
ãã® ã³ã ã¯ã¿ ã¼ã¯ ã 㸠㿠㫠㪠㼠ã 㣠㪠ã 㼠㿠転 é ã®ã ãã« ã S / P D I F ( S o n y & Philips Digital Interconnect Format) 㤠㳠㿠㼠ã 㧠㤠ã¹ã æ¥ç¶ ãã¾ãã JSP1
VCC SPDIF GND
S/PDIF Bracket ( 㪠ã 㷠㧠㳠)
2-15
M S-7519 M ainboard
ããã³ãããã«ã³ãã¯ã¿ã¼ : JFP1, JFP2
æ¬è£½å 㫠㯠ãã ã³ãã ã 㫠㹠㤠ã ã ã L E D ã 対 象 㨠ããé» å ç æ¥ ç¶ ç¨ ã« ã ä¸ ã¤ ã® ãã ã³ãã ã ã« ã³ãã¯ã¿ ã¼ã ç¨ æããã¦ãã¾ãã JFP1 㯠Intel® Front Panel I/ O Connectivity Design Guideã« æºæ ãã¦ãã¾ãã
JFP1 Pin Definition
Power Power LED Switch + PIN 1 2 10 9 + - - + HDD Reset LED Switch 3 4 5 6 7 8 9 SIGNAL HD_LED + FP PWR/SLP HD_LED FP PWR/SLP RST_SW PWR_SW + RST_SW + PWR_SW RSVD_DNU DESCRIPTION Hard disk LED pull-up MSG LED pull-up Hard disk active LED MSG LED pull-up Reset Switch low reference pull-down to GND Power Switch high reference pull-up Reset Switch high reference pull-up Power Switch low reference pull-down to GND Reserved. Do not use.
JFP1
2 1
JFP2 Pin Definition
PIN Speaker + + 8 7 Power LED 1 2 3 4 5 6 7 8 SIGNAL GND SPKSLED BUZ+ PLED BUZNC SPK+ DESCRIPTION Ground SpeakerSuspend LED Buzzer+ Power LED BuzzerNo connection Speaker+
JFP2
2 1
CD-Inã³ãã¯ã¿ã¼: JCD1
ãã® ã³ ãã¯ã¿ ã¼ã¯ C D - R O M 㪠㼠ã 㣠㪠ã³ã ã¯ã¿ ã¼ã æ¥ç¶ ãã¾ ãã
JCD1
R GND L
2-16
Hardware Setup
ããã³ãããã«ãªã¼ãã£ãªã³ãã¯ã¿ã¼ : JAUD1
ããã³ãããã«ãªã¼ãã£ãªãã³ãããã¼ã使ç¨ããã¨ããã³ã¨ããã«ãã㮠㪠㼠ã ã£ ãª åº å ã å¯ è½ã«ãªãã¾ãã ã ã³ é
å 㯠Intel® Front Panel I/O Connec tivity Design Guideã« æºæ ãã¦ãã¾ãã JAUD1
9 10 1 2
HD Audio Pin Definition
PIN 1 2 3 4 5 6 7 8 9 10 SIGNAL MIC_L GND MIC_R NC LINE out_R MIC_JD Front_JD NC LINE out_L LINEout_JD DESCRIPTION Microphone - Left channel Ground Microphone - Right channel Analog Port - Right channel Jack detection return from front panel microphone JACK1 Jack detection sense line from the High Definition Audio CODEC jack detection resistor network No control Analog Port - Left channel Jack detection return from front panel JACK2
T PM ã¢ã¸ã¥ã¼ã«ã³ãã¯ã¿ã¼ : JT PM1( ãªãã·ã§ã³ )
ãã® ã³ãã¯ã¿ ã¼ã¯ TPM (Trusted Platform Module) 㢠ã¸ã¥ ã¼ ã« ( 㪠ã 㷠㧠㳠) ã æ¥ç¶ ãã¾ãã 詳 ç´°ã«ã¤ ãã¦ã¯ T P M ã» ã ã¥ãª ã 㣠ãã© ã ã ã ã¼ã ã ã 㥠㢠㫠ã åç
§ ã ã¦ãã ããã
2 1
Pin 1 3 5 7 9 11 13
Signal LCLK LRST# LAD0 LAD1 LAD2 LAD3 LFRAME#
Description LPC clock LPC reset LPC address & data pin0 LPC address & data pin1 LPC address & data pin2 LPC address & data pin3 LPC Frame
Pin 2 4 6 8 10 12 14
Signal 3V_STB VCC3 SIRQ VCC5 KEY GND GND
Description 3V standby power 3. 3V power Serial IRQ 5V power No pin Ground Ground
2-17
M S-7519 M ainboard
ããã³ãUSB ã³ãã¯ã¿ã¼: JUSB1~4
æ¬è£½å ã«ã¯ Intel ® I/O Connectivity Design Guideã« æºæ ãã USB 2. 0 ã ã³ ã ã ã ã¼ ã æè¼ ããã¦ãã¾ãã USB ã æ± ç¨ æ§ ã é 常 ã« é« ãã å¤ ä»ã USB HDD ãã ã¸ã¿ ã« ã«ã¡ã©ãM P 3 ãã¬ã¤ã¤ã¼ãããªã³ã¿ãªã©æ§ã
ãªæ©å¨ã«å¯¾å¿ãã¾ãã
Pin Definition
10 9 PIN 1 3 2 1 5 7 9 SIGNAL VCC USB0USB0+ GND Key (no pin) PIN 2 4 6 8 10 SIGNAL VCC USB1USB1+ GND NC
JUSB1~4
USB 2. 0 Bracket ( ãªãã·ã§ã³)
注æï¼
V C C ã ã³ã¨ G N D ã ã³ã¯å¿
ã æ¥ç¶ ãã¦ã ã ããã æ¥ ç¶ ããªãå ´ åã æ©å¨ ã® é大ãªæå·ãåã¼ãæããããã¾ãã
2-18
Hardware Setup
ã¸ã£ã³ã
ã¯ãªã¢CMOSã¸ã£ã³ã: JBAT1
æ¬è£½å ã«ã¯ CMO S RA M ã æè¼ ãã㦠ã ãã å
èµ é» æ± ã ãé»æ°ã ä¾çµ¦ ãããã㨠ã§ã·ã¹ãã æ
å ± ã BIOS ã® è¨ å®ã ä¿ æ ãã¦ãã¾ãããã® CMOS RAM ã« è ã ããã ã ã 㤠㹠æ
å ± ã« ã㣠㦠ã O S ã è¿
é ã« èµ· å ã ã ã ã 㨠ã å¯ è½ã« 㪠ã ã¾ ã ã ã·ã¹ ãã è¨ å® ã 㯠㪠㢠ãã ãå ´ åã ã㮠㸠㣠㳠ãã æ¼ ã 㦠ã ã¼ ã¿ ã 㯠㪠㢠ãã¾ ãã
3 1 3
JBAT1
1
1
ãã¼ ã¿ã ä¿å
ã ã¼ ã¿ ã ã¯ãª ã¢
注æï¼
CMO S ã ã¯ãª ã¢ããã«ã¯ãã·ã¹ãã ã ãªã ã® é ã« ã ã³ 2 -3 ã㷠㧠ã¼ã ( ç絡 ) ãã¾ãã 次 ã㧠ã ã³ 1 -2 ã㷠㧠ã¼ãã« æ» ãã¾ããã·ã¹ãã èµ· å æ ã® C MO S ã®ã¯ãªã¢ã¯çµ¶å¯¾æ¢ãã¦ãã ããããã¶ã¼ãã¼ãã®ç ´æãç«ç½ãªã©ã«å㶠å±éºãããã¾ããå¿
ãé»æºã³ã¼ããæãã¦ãã ããã
ãã¼ãã¦ã§ã¢ãªã¼ãã¼ã¯ãã㯠FSB ã¸ã£ã³ã : JB1, JB2
㸠㣠ã³ã J B 1 , J B 2 ã® å¤æ´ ã éã ã¦ã F S B ã 㪠ã¼ãã¼ ã¯ãã 㯠ã㦠ã ãã»ããµ ã¼ å¨æ³¢æ°ãä¸ãããã¨ãã§ãã¾ãã以ä¸ã®èª¬æã«å¾ã£ã¦F S B ãè¨å®ãã¦ãã ã ãã
1
JB2 JB1
1 3 1 3 1 3
1
3
1
3
JB1 JB2
ãã ã©ã« ã 200->266 MHz 200->333 MHz 266->333 MHz 200->400 MHz 266->400 MHz 333->400 MHz
注æï¼
ã¸ã£ã³ããå¤æ´ããåã«ã·ã¹ãã ãçµäºãã¦ãã ããã
2-19
M S-7519 M ainboard
ã¹ããã
PCI Expressã¹ããã
P CI E xp res s ã¹ ãã ã㯠P CI Expr es s 㤠㳠㿠㼠ã ã§ ã¤ ã¹ æ¡ å¼µã« ã¼ãã ãµã ã¼ãã ã¾ãã PCI Expres s 2. 0x 16 ã¹ ãã ã㯠8. 0 G B/s ã¾ã§ã® 転 é é 度 ã ãµã ã¼ããã¾ãã PC I Expres s x1 ã¹ ãã ã㯠2 50 M B /s ã¾ã§ã® 転 é é 度 ã ãµã ã¼ããã¾ãã
PCI Express x16ã¹ ãã ã
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Hardware Setup
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2-21
BIOS Setup
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3-2
BIOS Setup
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3-3
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Standard CM OS Features æ¥ä»/ æå»ãªã©ã®ã·ã¹ãã ã®åºæ¬çãªè¨å®ãè¡ãã¾ãã Advanced BIOS Features A M I ® å°æ å¼· å æ©è½ ã®è¨ å® ãè¡ ãã¾ ãã Integrated Peripherals I D E ã 㵠㦠㳠ãæ© è½ ãã° ã©ã 㣠ã 㯠æ©è½ 㪠㩠㮠å 種 㪠㳠ã ã¼ã æ© è½ã® è¨å® ã è¡ ãã¾ãã Power M anagement Setup é»æºç®¡çã«é¢ããè¨å®ã è¡ãã¾ãã H/W M onitor P C ã® ç¶æ
ã表 示ãã¾ãã BIOS Setting Password è¨å®å¤æ´ãå¶éããããã®ãã¹ã¯ã¼ããè¨å®ãã¾ãã Cell M enu å¨æ³¢æ°/ é»å§ã®ã³ã³ããã¼ã«ããªã¼ãã¼ã¯ããã¯ã®è¨å®ã決å®ãã¾ãã Load Fail-Safe Defaults B I O S ãã³ãã¼ãè¦å®ããåæè¨å®å¤ã§ãåä½ã®å®å®æ§ãåªå
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3-4
BIOS Setup
Load Optimized Defaults å·¥å ´åºè·æã®è¨å®ããã¼ããã¾ããåä½ã®å®å®æ§ã¨æ§è½ã®é£ãåããåãã è¨å®å¤ã§ãã Save & Exit Setup å¤æ´ããè¨å®å¤ãä¿åãã¦çµäºãã¾ãã Exit Without Saving å¤æ´ããè¨å®å¤ãä¿åããçµäºãã¾ãã
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Standard CMOS Features
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Date (MM:DD:YY) ã·ã¹ ã ã ã® æ¥ ä» è¨å® ã è¡ ãã¾ ã ã < æ æ¥ > ã < æ > ã < å¹´ > ã® æ¸ å¼ ã§ ãã day ææ¥ãS u n ( æ¥ææ¥) ããS a t ( åææ¥) ãB I O S ã®èªåè¨ç® ã§æ¥ä»ããèªåçã«æ±ºå®ããã¾ãã month æ ã J an ï½ Dec ã J an(1 æ ) ã Feb(2 æ ) ã Mar(3 æ ) ã Apr(4 æ ) ã May(5 æ ) ã J un (6 æ ) ã J ul (7 æ ) ã Aug (8 æ ) ã Sep (9 æ ) ã O c t( 10 æ ) ã Nov(11 æ ) ã Dec(12 æ ) date æ¥ ã 1 ï½ 3 1 ã ã ã¼ å
¥ å ã å¯ è½ ã§ ãã y e a r å¹´ ã㦠ã¼ã¶ã¼ ãå¤æ´ ã§ãã¾ ãã Time (HH:MM :SS) ã·ã¹ãã ã® æ å» è¨ å®ãè¡ã ã¾ãã å½¢ å¼ ã¯ < æ > < å > < ç§ > ã§ãã IDE Master/ Slave, SATA1~6 < E n t e r > ã æ¼ ã ã¨ã以ä¸ã® ã ã¡ ã 㥠ã¼ã 表示ã ãã¾ã ã
3-6
BIOS Setup
Device / Vendor / Size I DE ã 㣠㳠ã ã«ã S ATA ã 㣠㳠ã ã«ã« æ¥ç¶ ãããã ã ã¤ã¹ã® æ
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ç® ã§ D M A 㢠㼠ã ã æ å¹ ã ç¡ å¹ ã« ã ã¾ ã ã Hard Disk S. M. A. R. T. ãã¼ãã 㣠㹠㯠㮠S. M. A. R. T. (Self-Monitoring Analysis&Reporting Technology) æ©è½ã æå¹ ã«ãã¾ãã S . T ã¯ã 㣠㹠㯠ã¹ãã¼ã¿ã¹ã ç£ è¦ ãã¦ãã¼ã ãã£ã¹ã¯æ
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3-7
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Halt On èµ·åæã«ã¨ã©ã¼ãçºçããå ´åã«ã·ã¹ãã ã®åä½ãè¨å®ãã¾ãã [All Errors] ã¨ã©ã¼ãçºçããã¨ã·ã¹ãã ãæ¢ã¾ãã¾ãã [No Errors] ã¨ã©ã¼ãçºçãã¦ãã·ã¹ãã ãæ¢ã¾ãã¾ããã System Information < E n t e r > ã ã¼ã æ¼ ã㨠ãµã ã¡ ã㥠ã¼ã表 示ãã ã¾ãã
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3-8
BIOS Setup
Advanced BIOS Features
BIOS Flash Protection ãã® æ© è½ ã¯ æ¨© é 㮠㪠ã 㦠㼠ã¶ã¼ ã ã ã 㯠㦠㣠㫠㹠ã ã å¶ ç¶ç 㪠æ å· ã ã B I O S ã ä¿è· ãã¾ãã æå¹ ã«è¨ å®ãã æ ã F l as h ã¦ã¼ã 㣠㪠ã 㣠㧠B I O S ãã¼ã¿ã¼ãå¤ æ´ã§ãã¾ ã ã ã Flash Protec tion æ©è½ã ç¡å¹ ã«è¨å®ããã¨ã BIO S ãã¼ã¿ã¼ãæ´ æ° ã§ãã¾ãã Full Screen Logo Display èµ·åç»é¢ã«ã¯ã¡ã¼ã«ã¼ã®ãã´ã表示ãããã©ãããè¨å®ããé
ç®ã§ãã [Enabled] èµ·åæã«ãã«ã¹ã¯ãªã¼ã³ã«éæ¢ãã´ã表示ãã¾ãã [Disabled] èµ·å æ ã« P O S T ã¡ãã»ã¼ ã¸ã表示 ãã¾ãã Quick Booting [ En ab led] ã«è¨å®ããã¨ããã㤠ã ã®ã ã ã¤ã¹ ã ã§ã 㯠ã çç¥ ã㦠è¿
é ãªã·ã¹ã ã èµ·åãè¡ãã¾ãã Boot Up Num-Lock LED èµ·å æ ã® N u m - L oc k è¨å® ( ã ã³ã ã¼ã® æå¹ / ç¡å¹ ) ã é¸æ ãã¾ãã [ O n ] ã«è¨å®ãã 㨠Num-Lock ã ON( ã ã³ã ã¼ã æå¹ ) ã [Off] ã«è¨å®ãã㨠Num-Lock ã Off( ã ã³ã ã¼ ãç¡å¹) ã«ãªãã¾ãã IOAPIC Function APIC (Advanced Programmable Interrupt Controller) ã« é¢ ããè¨å® é
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MPS Table Version ããã§ã¯ OS 㫠対 ã㦠㩠㮠MPS (Multi-Processor Specification) ã ã¼ã¸ ã§ã³ ã使ã ã ã é¸ æ 㧠ã ã¾ ã ã ã© ã® ã 㼠㸠㧠㳠ã 使 ç¨ã ã ã 㯠O S ã ã³ ã ã¼ ã« ã å ã å ã ããã ããã Primary Graphicâs Adapter ã©ã®V G A ããã¤ã¹ããã©ã¤ããªã°ã©ãã£ãã¯ã¹ã«ã¼ãããæå®ãã¾ãã PCI Latency Timer å P C I ã ã ã¤ã¹ ã 次 ã® ã㤠ã¯ãª ã¼ ã ã¼ ã¾ã§ ã« ã ã¹ ã ä¿ æ ã§ã ã é· ã ãè¨ å®ã ã¾ ãã é« ã å¤ã è¨ å®ã ã㨠ã å P C I ã ã ã¤ã¹ ã¯ é· æ é ã 㩠㳠㶠㯠㷠ã§ã³ ã ç¶ æ ã 㦠æå¹ P C I ãã³ ã å¹
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Execute Bit Support Intel's Execute Dis able Bit æ©è½ã¯ æª æ ã® ã ãããã°ã©ã ( 㪠㼠ã ã¼ããã¼ æ» æ ) ã é² å¾¡ ã ã ãã ã® æ© è½ ã§ ãã ã ã® æ© è½ ã ãµ ã ã¼ ã ã ã C P U ã æ è¼ ã ã å ´åã® ã¿ è¨å® ã§ãã¾ ããè¨ å® ãª ã ã· ã§ã³ 㯠[ E n a b l e d ] 㨠[ D i s a b l e d ] ã§ãã Intel's Execute Disable Bit æ©è½ã ãµ ã ã¼ããã CPU ã æè¼ ããå ´åã«è¨å®ã å¯è½ã§ãã Set Limit CPUID MaxVal to 3 CPUID ã¨ã¯ãã·ã¹ãã ã« æè¼ ããã CPU ã OS ã è å¥ ããããã® è¨ å· ã§ãã OS ã® ãªãª ã¼ã¹ ææ 㨠CPU ã® ãªãª ã¼ã¹ ææ ã« é ãã ã ãå ´åã OS ã CPU ã å³å¯ã«èå¥ãããã¨ã¯å°é£ã«ãªãã¾ãããã®ãããªåé¡ãåé¿ãããã ã«ã B I O S ã«ã ã®è¨ å® é
ç® ã 便 å® ç ã«è¨ ã ã ã 㦠ãã¾ ãã Chipset Feature < E n t e r > ã ã¼ã æ¼ ã㨠ã 次 ã®ã¡ ã㥠㼠ã表示 ããã¾ ãã
HPET HPET (High Precision Event Timers) 㯠ã ããã»ããã® é¨ å 㧠ã ã ã³ã³ ã ã¼ ã ã³ ãã§ãã æå¹ ã«è¨å®ããã¨ã æ§ ã
㪠A C P I æ¹æ³ ã é ã ã¦ã H P E T ãä½¿ç¨ ã§ãã¾ãã
3-10
BIOS Setup
Boot Sequence < E n t e r > ã ã¼ã æ¼ ã㨠ã 次 ã®ã¡ ã㥠㼠ã表示 ããã¾ ãã
1st/ 2nd Boot Device B I O S ã¯ã ã㧠æå® ãã ã é çª ã§ ã㩠㤠ã ãã O S ãèµ· åã ã¾ã ã Boot From Other Device [Yes ] ã«è¨å®ããã¨ ä¸ è¨ ã® 1s t/2n d/3rd ã§æå®ãããã ã ã¤ã¹ ãã èµ·åã§ã㪠ãå ´åã«ä»ã®ããã¤ã¹ããèµ·åã試ã¿ã¾ãã Trusted Computing < E n t e r > ã ã¼ã æ¼ ã ã¨ã 次 ã® ãµ ã ã¡ ã㥠㼠ã表 示ãã ã¾ã ã
TCG/TPM SUPPORT ãã®ã 㣠ã¼ã«ã㧠T C G / T P M ãµ ã ã¼ãã æå¹ / ç¡å¹ ã«ãã¾ãã Execute TPM Command [ E n ab l e] ã«è¨å®ããã¨ãã·ã¹ãã ã T P M ã³ ã ã³ ããå®è¡ãã¾ãã Clearing the TPM < En ter> ã ã¼ã æ¼ ãã¨ã T PM ã® ç¶æ
ã 㯠㪠ã¢ãã¾ãã TPM Enable/Disable status, TPM Owner Status T P M ã® ç¶æ
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3-11
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Intel Robson Configuration < E n t e r > ã ã¼ã æ¼ ã ã¨ã 次 ã® ãµ ã ã¡ ã㥠㼠ã表 示ãã ã¾ã ã
Intel Robson ãã® ã¢ã¤ ãã 㯠I n t e l R o b s o n ã 㯠ã ã㸠㼠ã æå¹ / ç¡å¹ ã«ã ã¾ã ã I n t e l R ob s on ã 㯠ã ãã¸ã¼ã¯ t ur b o m em or y ã 㯠ã ãã¸ã¼ã§ ã ããã¦ã¼ã¶ã¼ã é » ç¹ ã« ã 㣠㹠㯠ã 㢠㯠㻠㹠ã ã ã« ã O S ãèµ· å 㧠ã ã¾ ã ã ã ã® æ¹ æ³ ã§ ã é 度 ã 2 0 % é« ã ã 大 ã ã㢠ã 㪠㱠ã¼ã· 㧠㳠ã ãã° ã© ã ã® é度 ã 2 åé« ãã èµ·å ã®æéãé»åæ¶èãæ¸ããã¾ãã
3-12
BIOS Setup
Integrated Peripherals
USB Controller ãã® è¨ å® ã§ ã 㪠㳠ã ã¼ ã U S B ã³ã³ ã ã ã¼ ã© ã¼ã æ å¹ / ç¡ å¹ ã« ã ã¾ ã ã USB Device Legacy Support OS ã« USB ç é¢ã®ã ã ã¤ã¹ã使ã å ã«ã [Enabled] ã é¸æ ãã å¿
è¦ ã ã ãã¾ãã Onboard LAN Controller ãã® è¨ å® ã§ ã 㪠㳠ã ã¼ ã L A N ã³ ã³ ã ã ã¼ ã© ã¼ ã æ å¹ / ç¡ å¹ ã« ã ã¾ ã ã LAN Option ROM ãã®ã¢ã¤ãã ã¯ã L A N ã³ã³ ããã¼ã©ã¼ã® B oo t R O M ã å¼ã³åº ã ã ã© ã ã ã 決 å® ãã¾ãã Onboard IEEE1394 Controller ãã®è¨å®ã§ã 㪠㳠ã ã¼ã I E E E 1 3 9 4 ã³ã³ ããã¼ã© ã¼ã æå¹ / ç¡å¹ ã«ã ã¾ãã Extra IDE Controller ãã®è¨å®ã§ã E xt r a I D E ã³ã³ ããã¼ã©ã¼ã æå¹ / ç¡å¹ ã«ãã¾ãã HD Audio Controller ãã®è¨å®ã§ããªã³ãã¼ããªã¼ãã£ãªã³ã³ããã¼ã©ã¼ãæå¹/ ç¡å¹ã«ãã¾ãã On-Chip ATA Devices < E n t e r > ã ã¼ã æ¼ ã㨠ã 次 ã®ã¡ ã㥠㼠ã表示 ããã¾ ãã
3-13
M S-7519 M ainboard
PCI IDE BusMaster ãã®ã¢ã¤ ãã ã§ã B I O S ã æå¹ / ç¡å¹ ã«ã ã ã ã¹ ãã¹ã¿ ã¼ã I D E ãã©ã¤ ã ã« èªã¿è¾¼ã¿/ æ¸ãè¾¼ã¿ãã¾ãã On-Chip SATA Controller ã㮠㢠㤠ãã 㧠ã S A T A ã³ã³ ã ã ã¼ã© ã¼ ã æ å¹ / ç¡å¹ ã« ã ã¾ ãã RAID M ode SATA ãã¼ãã 㣠㹠㯠ã®ããã® RAI D ã æå¹ / ç¡å¹ ã«ãã¾ããè¨å® 㪠ãã· ã§ã³ 㯠[RAID], [AHCI]㨠[IDE]ã§ãã I/O Device < E n t e r > ã ã¼ã æ¼ ã㨠ã 次 ã®ã¡ ã㥠㼠ã表示 ããã¾ ãã
COM Port 1 ã·ãª 㢠㫠ã ã¼ ã1 ã®I / O ã ã¼ ã 㢠ã ã¬ ã¹ ã¨ é¢ é£ ã® å² ã è¾¼ ã¿ ã è¨ å® ã ã¾ ã ã Parallel Port ãªã³ãã¼ããã©ã¬ã«ãã¼ãã®I / O ãã¼ãã¢ãã¬ã¹ãè¨å®ãã¾ãã [Disabled] ç¡å¹ [3BC] ã㪠ã³ã¿ ãã¼ ã 0 [278] ã㪠ã³ã¿ ãã¼ ã 2 [378] ã㪠ã³ã¿ ãã¼ ã 1 Parallel Port M ode [Normal] Standard Parallel Port [EPP] Enhanced Parallel Port [ECP] Extended Capability Port [ECP + EPP] Extended Capability Port + Enhanced Parallel Port [Bi-Directional] ãªã³ãã¼ããã©ã¬ã«ãã¼ããæ¨æºãã©ã¬ã«ãã¼ãã¨ãã¦ã®ã¿ä½¿ç¨ããå ´ åã¯ã [SP P] ã é¸æ ãã¦ãã ããã åæ ã« EP P 㢠ã¼ãã¨ã㦠ã 使ç¨ããå ´å 㯠[EPP] ã é¸æ ãã¦ãã ããã [ECP] ã é¸æ ããã¨ã ECP 㢠ã¼ãã§ã® ã¿ å ä½ ã ã¾ãã ECP+EPPã é¸æ ãããã¨ã«ãã£ã¦ã ECP㨠EPPã åæ ã« ãµ ã ã¼ãã§ã ã¾ãã
3-14
BIOS Setup
Power Management Setup
注æï¼
ã ã® ç¯ ã§ è¨ è¿° ã ã ã S 3 ã¹ ã ã¼ ã ã« é¢ é£ ã ã æ© è½ ã¯ ã O S ãã ã¼ ã 㦠㧠ã¢ã S 3 æ© è½ ã ãµ ã ã¼ ã ã ã å ´ å 㮠㿠使 ç¨ ã§ ã ã¾ ã ã ACPI Function ACPI(Advanced Configuration and Power Management Interface) æ©è½ã® æå¹ / ç¡å¹ ãè¨å®ãã¾ãã ã 使ç¨ã«ãªã OS ãã« å¯¾å¿ ãã¦ããå ´å (W indows 98SE/2000/ME) 㯠[E nabl ed ] ã«è¨å®ãã¦ãã ããã ACPI Standby State ACPI ç é» å 㢠ã¼ããæå®ãã¾ãã W indows 2000/ XP 㪠㩠㮠ACPI ã ãµ ã ã¼ãã ã O S ã使ç¨ããå ´åã¯ããã® é
ç® ã®è¨å®ã«ãã£ã¦ S1(PO S) ã¾ã㯠S3(ST R) ã® ç é»åã¢ã¼ãã¸ã®åãæ¿ããå¯è½ã§ããè¨å®ã¯ä»¥ä¸ã®éãã§ãã [S1] S1 㯠C PU / ã ããã»ãã / ã·ã¹ãã ã¡ ã¢ãª ã« é é»ãã ç¶æ
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æ©ãã¾ããã·ã¹ãã ã®å¾©å¸°æéãéãã®ãç¹å¾´ã§ ãã [S3] åä½ ç¶ æ
ã ã· ã¹ ã ã ã¡ ã¢ ãª ã« è¨ æ¶ ã 㦠ã 㡠㢠㪠以 å¤ ã®ã ã® ä» ã® ã ã ã¤ ã¹ ã¸ ã® é» æº ä¾ çµ¦ ã å æ¢ ã ã¾ ã ã 復 帰 ã« ãã æé ã æ ã ãã¾ ããã S 1 ã¨ æ¯ ã¹ ã¦ ç é» åå¹ ç ã é« ã ãªã ã¾ãã
3-15
M S-7519 M ainboard
Power Button Function ãã¯ã¼ãã¿ã³ã®æ©è½ãè¨å®ãã¾ããé¸æã§ããè¨å®ã¯ä»¥ä¸ã®éãã§ãã [Power On/Off] é 常 㮠㪠㳠/ 㪠ã ã 㿠㳠㨠ã 㦠å ä½ ã ã¾ ã ã [Suspend] é»æºãã¿ã³ãæ¼ãã¨ãµã¹ãã³ã/ ã¹ãªã¼ãã¢ã¼ãã«å
¥ã ã¾ãã4 ç§ä»¥ä¸æ¼ãã¨é»æºãªãã«ãªãã¾ãã Restore On AC Power Loss ã·ã¹ãã ã®é»æºãæ£è¦ã®æä½ã§ã·ã£ãããã¦ã³ãããªã£ããå ´åã®åä½ãè¨ å®ãã¾ãã [Off] 㷠㣠ã ã ã 㦠㳠ã ã 㾠㾠㫠㪠ã ã¾ ã ã [On] ä¸æ£ãªã·ã£ãããã¦ã³å¾ã«åèµ·åãã¾ãã [Last State] ä¸æ£ 㪠㷠㣠ã ã ã ã¦ ã³ å¾ ã« å èµ· å ã 㦠ã 㷠㣠ã ã ã 㦠㳠åã®ç¶æ
ãåç¾ãã¾ãã Wakeup Event Setup < E n t e r > ã ã¼ã æ¼ ãã¨ ä»¥ä¸ ã®ç»é¢ ã表 示ãã ã¾ãã
Wake Up Event By [ B I O S ] ã«è¨å®ãã¦ä»¥ä¸ã® ã 㣠ã¼ã«ããèµ· åãã¾ãããã® ã 㣠ã¼ã«ã㧠å復 㤠ã ã³ ã ãè¨ å® ã§ã ã¾ã ã [ O S ] ã«è¨ å®ã ã㨠ã å 復 㤠ã ã³ ã ã O S ã«ãã éå®ããã¾ãã Resume From S3 By USB Device USB ã ã ã¤ã¹ ãã ã®å
¥ å ä¿¡ å· ã ç¢ºèª ãããå ´åãã·ã¹ãã ã S3(Suspend to R A M ) ã¹ã ã¼ ã ãã èµ· å ãã æ© è½ ã è¨å® ã ã¾ ãã Resume From S3 By PS/2 Keyboard ãã® é
ç® ã§ P S / 2 ã ã¼ ã ã¼ ã ã ã· ã¹ ã ã ã èµ· å 㧠ã ã ã ã© ã ã ã 決 å® ã ã¾ ãã Resume From S3 By PS/2 M ouse ãã® é
ç® ã¯ P S / 2 ã 㦠㹠㮠å
¥ å ä¿¡ å· ã 確 èª ã ã ã å ´ å ã ã· ã¹ ã ã ã èµ· å 㧠ãããã©ããã決å®ãã¾ãã Resume By PCI Device (PM E#) [ E n a b l e d ] ã«è¨å®ããã¨ã P C I ã ã ã¤ã¹ã®ã¤ ã ã³ ã çµç± ã§ã·ã¹ãã ã ç é» åã¢ã¼ããã復帰ããããè¨å®ãã¾ãã
3-16
BIOS Setup
Resume By PCI-E Device [Enabled] ã«è¨å®ããã¨ã PCIE ã ã ã¤ã¹ã®ã¤ ã ã³ ã çµç± ã§ã·ã¹ãã ã ç é» å ã¢ã¼ããã復帰ããããè¨å®ãã¾ãã Resume by RTC Alarm è¨å® æ¥ æ ã« S 3 ãµ ã¹ ã ã³ ã ã ã ã· ã¹ã ã ã èµ·å ã ã æ©è½ ã® æ å¹ / ç¡å¹ ã è¨ å® ãã¾ãã
3-17
M S-7519 M ainboard
H/W Monitor
Chassis Intrusion ã± ã¼ ã¹ ã® éæ¾ ã æ¤ ç¥ / è¨é² ã 㦠ã ç»é¢ ä¸ ã« è¦ å ã¡ ã 㻠㼠㸠ã表 示 ã ã æ©è½ ã è¨ å®ã ã¾ ã ã è¦ å ã¡ ã ã»ã¼ 㸠ã 㯠㪠㢠ã ã ã«ã¯ ã ä¸ æ¦ B I O S ã¡ ã 㥠ã¼ã èµ· åã 㦠ãã® é
ç® ã [ R e s e t ] ã«è¨ å® ãã¾ ã ã 㪠㻠ã ãã« è¨ å® ãã 㨠è¦å ã ã° ã æ¶ å» ãã èª å ç ã« [E nabl ed ] ã« æ» ãã¾ãã CPU Smart FAN Target æ¬è£½åã¯ã¹ãã¼ããã¡ã³ã·ã¹ãã ãæè¼ããããã¡ã³ã®å転æ°ãèªåçã«ã³ ã³ããã¼ã©ã¼ãã¾ããç®ä¸ã®æ¸©åº¦ã«ãã£ã¦ããã¡ã³ã®å転æ°ãæå®ã®ç¯å²å
ã§ä¿æãã¾ããã¦ã¼ã¶ã¼ããã¡ã³ã¿ã¼ã²ããå¤ãé¸æã§ãã¾ããç®ä¸ã®C P U ãã¡ã³ã®æ¸©åº¦ãã¿ã¼ã²ããå¤ã«éããã¨ãã¹ãã¼ããã¡ã³æ©è½ãåä½ãã¾ ããããã¤ãã®é¸æãæè¼ããèªåçã«å転æ°ãä¸ãã¦æ¸©åº¦ãä¸ãã¾ãã PC Health Status CPU/ System Temperature, CPU FAN/ SYS FAN Speed, CPU Vcore, 3. 3V, 5V, 12V ãã ã ã® é
ç® ã¯ ç¾ å¨ ã®ã·ã¹ãã ç¶æ
( CP U é» å§ / 温 度 ãã ã¡ ã³ å 転 æ° ãª ã© ) ã 表示ãã¾ãã
3-18
BIOS Setup
BIOS Setting Password
[BIOS Setting Pas s word] ã é¸æ ããã¨ã以ä¸ã®ã¡ãã»ã¼ã¸ã表示ããã¾ãã
æ 大 6 æå ã¾ã§ã® ã 㹠㯠ã¼ããå
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¥åããã¨ããã¹ã¯ã¼ãã確èªããã¡ãã»ã¼ ã¸ã表示ã ããã®ã§ã ã 㹠㯠ã¼ã ã ã ã ä¸åº¦ å
¥ å ãã¦ã ã ããã < E s c > ã ã¼ ãæ¼ãã¦ãã¹ã¯ã¼ããå
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¥ åãã ã« < E n t er > ã ã¼ã æ¼ ããã¨ã§ã ã 㹠㯠ã¼ãã ç¡å¹ ã«ã ã ãã¨ãã§ãã¾ãã以ä¸ã®ã¡ãã»ã¼ã¸ãåºã¦ããã¹ã¯ã¼ããç¡å¹ã«ãªã£ãã㨠ã確èªãã¾ãããã¹ã¯ã¼ããç¡å¹ã«ãªãã¨ãã·ã¹ãã ãèµ·åããå¾ãèªç±ã« ã»ããã¢ããã¡ãã¥ã¼ã«å
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3-19
M S-7519 M ainboard
Cell Menu
注æï¼
ãã®ãããã»ãããããç¥ã£ã¦ããå ´åã®ã¿ãããã®è¨å®ãå¤æ´ã§ã ã¾ãã Current CPU / DRAM Frequency C P U 㯠ã ã 㯠㨠㡠㢠㪠㹠ã ã¼ ã ã 表 示 ã ã¾ ã ã èª å å° ç¨ ã§ ãã D. O. T. Control
Dynamic Overclocking ã¯ãMSI ç¬èª ã® CoreCell æè¡ã å¿ç¨ãããç»æç ãªãª ã¼ ãã¼ã¯ããã¯æè¡ ã§ããDynamic Overclocking 㯠CPU ã«æãã è² è·ã ã¢ãã¿ã¼ ããCPU ã« é« ã è² è· ã ãã ã£ãå ´å㮠㿠㪠㼠ã 㼠㯠ãã 㯠ãè¡ãã¾ãã å¿
è¦ ãª æ ã«ã ã è¡ã å¹ ç ç 㪠㪠㼠ã 㼠㯠ãã 㯠㧠ã ãããã ã ã¼ ã ã« æ ã ã è² æ
ã å² å å° ãã æ ã ããã¨ãã§ãã¾ãã ä¸ ã ä¸ CPU ã«ç° 常 å ç± ãª ã© ã®ãã© ã ã« ã çºç ããå ´å㧠ã ã ç´ ã¡ ã« å®å
¨ ãªè¨å®å¤ã« èª å 復帰 ã㦠é常 ã®å ä½ ãè¡ã ã¾ãããã 㪠編é ã 3D ã²ã¼ã ãª ã© è² è· ã® å¤§ ã㪠ä½æ¥ ãè¡ãã¦ã¼ã¶ã¼ã«ã¯ã大 å¤ ä¾¿ å© ãªæ©è½ã§ãã BIOS ã®è¨å® 㪠ãã· ã§ã³ ã¯ä»¥ä¸ã® é ãã§ãã
3-20
BIOS Setup
注æï¼
Dynamic O verc l oc k 㯠æ 軽 ã«ã·ã¹ãã ã® é« æ§ è½ å ãå® ç¾ ã§ãã ã ã¼ã«ã§ ããã ã ã 1 % 㧠ã C P U ã ã¡ ã¢ ãª ã® å® æ ¼ ã è¶
ã ã è¨ å®ã§ 使 ç¨ ã ã å ´ å ã¯ãããã¾ã§ãã¦ã¼ã¶ã¼ã®èªå·±è²¬ä»»ã«ããã¦ä½¿ç¨ãããã¨ãåæã¨ãª ãã¾ããé»åé¨åã¯å®æ ¼ãè¶
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¨ æ§ ã« ä¸ å® ã æ® ã å ´ å 㯠ã è¨ å® ã [ D i s a b l e d ] ã« æ» ã ã D y n a m i c O v e r c l o c k æ©è½ã 㪠ã ã«ã ã ç¶ æ
㧠ã·ã¹ ãã ã ã ä½¿ç¨ ãã ããã Intel EIST æ¡å¼µ ç Intel SpeedStep ã 㯠ã ãã¸ã¼ (EIST) ã® æå¹ / ç¡å¹ ãè¨å®ãã¾ãã SpeedStep ã 㯠ã ã㸠㼠㯠C P U ã® ä» å ã« å¿ ã ã¦ é» å§ ã¨ å¨ æ³¢ æ° ãå¤ å ã ã ã éå° ãª é» æ° ã® æ¶ è²» 㨠ã ãã« ä¼´ ã çº ç± ã æ ã ãæ©è½ ã§ãã ç¾ è¡ã§ã¯ W i n d ows XP S P 2 ã® ã¿æ¡ å¼µ ç Intel Sp eedStep ã 㯠ã ãã¸ã¼ (EIS T ) ã ãµ ã ã¼ããã¦ãã¾ãã æ¡å¼µ ç Intel SpeedStep ã 㯠ã ãã¸ã¼ (EIST) ã ãµ ã ã¼ããã CPU ã æè¼ ããå ´åã«è¨å®ã å¯ è½ã§ãã Adjust CPU FSB Frequency (M Hz) ãã®ã¢ã¤ãã ã¯ èª¿æ´ ãã C P U F S B å¨æ³¢æ° ãè¨å®ãã¾ãã Adjusted CPU FSB Frequency (MHz) ãã®ã¢ã¤ãã ã¯ èª¿æ´ ãã CPU å¨æ³¢æ° (FSB x Ratio) ã表示ãã¾ãã èªåå° ç¨ã§ãã Advance DRAM Configuration < E n t e r > ã ã¼ã æ¼ ã㨠ãä»¥ä¸ ã®ç» é¢ã表 示ãã ã¾ãã
Configure DRAM Timing by SPD [Auto] ã«è¨å®ããã¨ã DRAM 㢠㸠㥠ã¼ã« ä¸ ã® SPD (Serial Pres ence Detec t) EE PR O M 㯠DR AM ã¿ã¤ ã ã³ ã°ã ã³ã³ ããã¼ã«ãããã¨ãè¨å®ãã¾ãã MEMORY-Z < E n t e r > ã ã¼ã æ¼ ã㨠ãä»¥ä¸ ã®ç» é¢ã表 示ãã ã¾ãã
3-21
M S-7519 M ainboard
DIM M1~4 Memory SPD Infromation < E n t e r > ã ã¼ã æ¼ ã㨠ãä»¥ä¸ ã®ç» é¢ã表 示ãã ã¾ãã
DIM M1~4 Memory SPD Infromation ãã® é
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ã製ä½ãé¨åçªå·ãã·ãªã¢ã«çªå·ã SDRAMå¨æãDRAM TCLãDRAM TRCDãDRAM TRPãDRAM TRASãDRAM TRFCã DRAM TW Rã DRAM TW TRã DRAM TRRDå ã³ DRAM TRTP)ã èªå å°ç¨ã§ãã FSB/DRAM Ratio ã¡ ã¢ãª ã® F SB /D R AM åç ã® èª¿æ´ ãè¡ãã¾ãã Adjusted DRAM Frequency (MHz) èª¿æ´ ã ãã D R A M å¨æ³¢ æ° ã 表 示ã ã¾ ã ã èªå å° ç¨ ã§ ã ã Auto Disable DRAM /PCI Frequency [ E nab l ed ] ã«è¨å®ããã¨ãã·ã¹ãã ã¯ä½¿ç¨ãã¦ããªã P C I ã¹ããã㮠㯠ãã ã¯çº ä¿¡ ã å ãã E M I ã® çº ç ã 軽 æ¸ ã ã å ã ã ã ã ã¾ ã ã CPU Voltage (V) / DRAM Voltage (V) / NB Voltage (V) / VTT FSB Voltage(V) / SB Voltage (V) C P U , ã¡ ã¢ãª ã F S B ãã ã ãã» ãã ã®é» æº ç¶ æ
ã表 示ã ã¾ã ã èª åå° ç¨ã§ ãã Spread Spectrum ã³ã³ãã¥ã¼ã¿ã¼ã¯ã¯ããã¯ä¿¡å·ã¨å¼ã°ãããã«ã¹ä¿¡å·ãå
ã«åä½ãã¦ãã¾ ããã¯ããã¯ã¸ã§ãã¬ã¼ã¿ã¼ããã«ã¹ä¿¡å·ãçºçããéã«ãæ§é ä¸ãããå¾ ã ã¹ ã 㤠㯠ã 㤠ãºã¨ å¼ ã° ã ãé» ç£å¦¨ 害 ( E M I ) ã ç ã ã¾ ãã åº æ¬ ç ã«ã¯ ã ã¼ ã ä¸ã®é
ç·ã®åãåãã«ãã£ã¦ãã¤ãºãç¸æ®ºããããã«å·¥å¤«ãã¦ãã¾ãããã ãç¹å®ç°å¢ä¸ã«ããã¦å¤é¨ã«ãã¤ãºãæ¼ãã¦ãã¾ãå ´åãããããã®ãã㪠ã±ã¼ã¹ã§ã¯ã¹ãã¯ãã©ã æ¡æ£æ¹å¼ã§ä¿¡å·ã®æ³¢å½¢ãå¤æ´ãããã¨ã«ããããã¤ ãº ã® æ¼ ã ã å é¿ ã ã ã 㨠ã 㧠ã ã¾ ã ã é 常 㯠[ D i s a b l e d ] ã«è¨ å® ã 㦠使 ç¨ ã ã¾ ããã¾ã ã 㪠㼠ã 㼠㯠ã ã 㯠ã ãã ã ç¶æ
ã§ä½¿ ç¨ãã å ´å ã [ D i s a b l ed ] ã«è¨å® ãã¦ãã ãããæ¬æ©ãçºçããã¹ãã¤ã¯ãã¤ãºã«ãã£ã¦ãå¤é¨ã®æ©å¨ãä½ã ã ã® å½±é¿ ã å ã ã¦ãã¾ãã¨ãã£ã ç¾ è±¡ ã çºç ããå ´åã® ã¿ [ En abl ed] ã«è¨å®ãã¾ ããæå¹ã«è¨å®ããã¨ã¯ããã¯ä¿¡å·ã®æ³¢å½¢ãå¤æ´ããããããããã«ãã£ã¦ ã·ã¹ãã ã®å®å®æ§ãæãªãããå¯è½æ§ãããã¾ãã
3-22
BIOS Setup
注æï¼
1. EM I ã« åé¡ ããªãå ´åã¯ãã·ã¹ãã ã® å® å® æ§ ã¨ æ§ è½ã æ é© å ãããã ã« [Disabled] ã«è¨å®ã㦠ã ãã¦ãã ãããã ã ãã EMI ã« åé¡ ã ã ãå ´ åã¯ã [Enab led] ã«è¨å®ã㦠EM I ã 軽 æ¸ ãã¦ãã ããã 2. Spread Spectrum å¤ã¯ 大 ã ã ã 㰠大 ãã ã» ã© ã¾ãã¾ã EMI ã 軽 æ¸ ããã· ã¹ãã ã ä¸ å® å®ã«ãªãã¾ããå½ å° ã® E M I è¦ å®ã 調 ã¹ ã£ã¦ æ é©ã® S p read Sp ec tr um å¤ãè¨å®ãã¦ãã ããã 3. 㪠㼠ã 㼠㯠ã ã 㯠ã使 ç¨ã ã¦ã ãå ´ å㯠å¿
ã [ D i s a b l e ] ã«ã ã¦ã ã ã ããã¡ãã£ã¨ããã¸ãã¿ã¼ã§ãã£ã¦ãä¸æçã«ãã¼ã¹ããå¼ãèµ·ã ããã¨ããããããã«ãã£ã¦ãªã¼ãã¼ã¯ããã¯ãããããã»ããµã ããã¯ãã¦ãã¾ããã¨ãããããã§ãã
3-23
M S-7519 M ainboard
Load Fail-Safe/ Optimized Defaults
BIOS ã«ã¯ [Fail Safe defaults] 㨠[Optimized Defaults] ã® 2 é ãã®ããã©ã«ãè¨å® ãç¨ æ ããã¦ãã¾ãã åºè·æ 㯠[O ptimized Def aults] ãè¨å®ãã㦠ã ãããã¶ã¼ ã ã¼ãã® æ§ è½ã æ 大 ã« å¼ ã åº ãã¾ãã [F ail Saf e d ef au lts ] ã¯ã·ã¹ãã ã® å® å® æ§ ãåªå
ããè¨å®å¤ã§ãã [Load Fail Saf e def aults] ã®è¨å®ããã¼ããã é ã«ã¯ä»¥ä¸ã®ãããªã¡ãã»ã¼ã¸ã 表示ããã¾ãã
<Ok> ã ã¼ æ¼ ãã¨ã å® å® æ§ ã åª å
ãã [Fail Saf e def aults ] ããã¼ãããã¾ãã
[Load Optimized Defaults] ã é¸æ ããã¨ã 次 ã®ã¡ãã»ã¼ã¸ã表示ããã¾ãã
< O k > ã ã¼ æ¼ ã 㨠ã å·¥ å ´ åº è· è¨ å® ã® ã ã ã© ã« ã å¤ ãã ã¼ ã ã ã ã¾ ã ã
3-24
Realtek ALC888 Audio
Appendix A
Realtek ALC888 Audio
æ¬è£½ å 㯠1 0 ã㣠㳠ãã« D A C ãæ è¼ ã 㦠ã ã¾ ã ãã ã® DAC 㯠[Front-Out-Left ]㨠[Front-Out-Right]ãã£ã³ã ã«ã§ãåæã«7 . [. . . ] 8CH Sp eaker ã ãã ãã© ã³ 2c h ã¹ãã¬ãªã¹ ã ã¼ ã« ã¼ 4c h ãµã© 㦠ã³ãã¹ ã ã¼ ã« ã¼ 5. 1 c h ãµã© 㦠ã³ãã¹ ã ã¼ ã« ã¼ 7. 1 c h ãµã© 㦠ã³ãã¹ ã ã¼ ã« ã¼
Speaker Configuration: 1 . ãªã¼ãã£ãªã¸ã£ãã¯ã«ã¹ãã¼ã«ã¼ãæ¥ç¶ãã¾ãã 2. æ¥ ç¶ ããã¹ ã ã¼ ã« ã¼ã æ¤ç¥ ã ã ã [c onn ec ted d evic e] ã¨ã ãç»é¢ ã 表示 ã ã ã¾ããæ¥ç¶ããã¿ã¤ãã®ã¹ãã¼ã«ã¼ãé¸æãã¦ãã ããã -ããã¤ã¹ã¯æ£ããã¸ã£ãã¯ã«æ¥ç¶ã®å ´åãããã¤ã¹ã¨åãã«ãªãã¸ã£ãã¯ã® 横ã®ã¢ã¤ã³ã³ãæ¤ç¥ã§ãã¾ã. - æ¥ ç¶ ãæ£ãããªã å ´ å ã [Realtek HD Audio Manager] ã¯æ£ãã 㸠ã£ãã¯ã«ãã ã¤ã¹ã®æ¥ç¶ãæ¡å
ãã¾ãã
a
A-12
Realtek ALC888 Audio
Connector Settings ãã¿ ã³ ã æ¼ ãã¨ã [ C on n ec t or S et t i n g s ] 㦠ã£ã³ã 㦠ã é ã ã¾ãã
Disable front panel jack detection (option) ã¸ã£ãã¯æ¤ç¥æ©è½ã¯ H D ãªã¼ãã£ãªããã³ãããã«ã®ã¿ã«å¯¾ãã¦æå¹ã§ãã M ute rear panel output when front headphone plugged in. [. . . ]
MSI MS-7666 G52-76661X3ダウンロード上のご注意
Lastmanualsはユーザー主導型のハードウエア及びソフトウエアのマニュアル(ユーザーガイド・マニュアル・クイックスタート・技術情報など)を共有・保存・検索サービスを提供します。
お探しの書類がなかったり、不完全だったり、言語が違ったり、モデル名や言語が説明と違う場合など、いかなる場合でもLastmanualsはその責を負いません。またLastmanualsは翻訳のサービスもしていません。
規約に同意して「マニュアルをダウンロード」をクリックすればMSI MS-7666 G52-76661X3のマニュアルのダウンロードが開始されます。